hz
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set(MCU_VARIANT stm32wba65xx)
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set(JLINK_DEVICE STM32WBA65RI)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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STM32WBA65xx
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)
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endfunction()
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2025, Dalton Caron
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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/* metadata:
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name: STM32 NUCLEO-WBA65RI
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url: https://www.st.com/en/evaluation-tools/nucleo-wba65ri.html
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// LED (user LED 1)
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#define LED_CLK_EN __HAL_RCC_GPIOD_CLK_ENABLE
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#define LED_PORT GPIOD
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#define LED_PIN GPIO_PIN_8
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#define LED_STATE_ON 1
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// Button (user button 1)
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#define BUTTON_CLK_EN __HAL_RCC_GPIOC_CLK_ENABLE
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#define BUTTON_PORT GPIOC
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#define BUTTON_PIN GPIO_PIN_13
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#define BUTTON_STATE_ACTIVE 0
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// USART (on STM link USB connector)
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#define USART_GPIO_CLK_EN __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE
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#define USART_DEV USART3
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#define USART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE
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#define USART_TX_GPIO_PORT GPIOA
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#define USART_RX_GPIO_PORT GPIOA
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#define USART_GPIO_AF GPIO_AF8_USART3
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#define USART_TX_PIN GPIO_PIN_7
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#define USART_RX_PIN GPIO_PIN_5
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// USB Pins
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// These pints are only used for USB and must be in analog mode when not used.
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// They are by default configured for USB operation after reset.
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#define USB_DP_PORT GPIOD
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#define USB_DP_PIN GPIO_PIN_6
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#define USB_DM_PORT GPIOD
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#define USB_DM_PIN GPIO_PIN_7
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//--------------------------------------------------------------------+
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// The system clock is configured as follows:
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// System Clock source = PLL (HSE, crystal)
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// SYSCLK (CPU Clock) = 64 MHz
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// HCLK (AXI and AHB Clocks) = 64 MHz
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// AHB Prescaler = 1
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// APB1 Prescaler = 1 (APB3 Clock = 64MHz)
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// APB2 Prescaler = 1 (APB1 Clock = 64MHz)
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// APB7 Prescaler = 1 (APB2 Clock = 64MHz)
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// HPRE5 Prescaler = 2 (AHB5 Clock = 32MHz)
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// HSE Frequency (Hz) = 32 MHz
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// PLL_M = 2
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// PLL_N = 8
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// PLL_P = 2
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// PLL_Q = 2
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// PLL_R = 2
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// VDD (V) = 3.3 V
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// Flash Latency = 1 Wait States
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//--------------------------------------------------------------------+
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static void board_system_clock_config( void )
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
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RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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__HAL_RCC_PWR_CLK_ENABLE();
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( void ) HAL_PWREx_ConfigSupply( PWR_LDO_SUPPLY );
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// Must be in voltage scaling mode 1 for the OTG USB HS peripheral to function
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( void ) HAL_PWREx_ControlVoltageScaling( PWR_REGULATOR_VOLTAGE_SCALE1 );
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.HSEDiv = RCC_HSE_DIV1;
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RCC_OscInitStruct.PLL1.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL1.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL1.PLLM = 2;
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RCC_OscInitStruct.PLL1.PLLN = 8;
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RCC_OscInitStruct.PLL1.PLLP = 2;
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RCC_OscInitStruct.PLL1.PLLQ = 2;
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RCC_OscInitStruct.PLL1.PLLR = 2;
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RCC_OscInitStruct.PLL1.PLLFractional = 0;
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( void ) HAL_RCC_OscConfig( &RCC_OscInitStruct );
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RCC_ClkInitStruct.ClockType = ( RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
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| RCC_CLOCKTYPE_PCLK7 | RCC_CLOCKTYPE_HCLK5 );
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB7CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.AHB5_PLL1_CLKDivider = RCC_SYSCLK_PLL1_DIV2;
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RCC_ClkInitStruct.AHB5_HSEHSI_CLKDivider = RCC_SYSCLK_HSEHSI_DIV1;
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( void ) HAL_RCC_ClockConfig( &RCC_ClkInitStruct, FLASH_LATENCY_1 );
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( void ) SystemCoreClockUpdate();
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( void ) HAL_ICACHE_Enable();
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARD_H_ */
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+6
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MCU_VARIANT = stm32wba65xx
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CFLAGS += -DSTM32WBA65xx
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# For flash-jlink target
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JLINK_DEVICE = STM32WBA65RI
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